1. Field of the Invention
The present invention relates to a method for driving a plasma display panel (PDP).
The development is so advanced that a PDP has a high-definition large screen. A driving method is desired in which a brighter display can be achieved using a screen having many display lines.
2. Description of the Prior Art
There are two types of display forms of a frame as image data; one is an interlaced display and another is a progressive display. In the interlaced display, a frame is divided into plural fields so that the fields are displayed sequentially. Generally, the number of fields is two. In this case, odd display lines are used to display one of the fields, and even display lines are used to display the other field. More specifically, every other display line is used to display one field. As the number of fields is larger, the number of display lines used for one field is smaller. In the progressive display, all N display lines forming a display surface are used, and display contents are set for each of the display lines individually.
In a display using an AC type PDP, an addressing process is performed in a line-sequential manner for setting wall voltage of sells in accordance with display data, and then a sustaining process is performed for applying sustain voltage pulse to the cells. In other words, ON or OFF of light emission is determined in the addressing process and display discharge is generated in the sustaining process, the number of times of the display discharge corresponding to the display data. Since a cell of a PDP is basically a binary light emission element, it is impossible to display an image having pixels whose brightness is different from each other in a single addressing process. Therefore, in the interlaced display, one field is divided into plural subfields, and then the addressing process and the sustaining process are performed for each subfield. It is supposed that a subfield division number K is 8, and a ratio of luminance weight, i.e., a ratio of light emission amount with respect to total of eight times of sustaining processes is 1:2:4:8:16:32:64. The selection of subfield allows displaying 256 gradation levels from 0 to 255. In a display of an image having a frame rate of 30 such as a television image in NTSC format or general computer output, the addressing process and the sustaining process are conducted K times during the driving period for one field ( 1/60 seconds). Similar method is used to perform gradation reproduction also in the progressive display. A color display is one kind of a gradation display, and a display color is determined by combination of gradation of red, green and blue colors.
A digital signal processing technique enables not only an interlaced display of a frame in which the original image is interlaced like a television, but also a progressive display. A frame is only written into a memory to read out necessary portions. It is also possible to display a non-interlaced (progressive) frame such as computer output in interlaced format. It is an option in designing of a drive circuit whether a PDP adopts the progressive display or the-interlaced display. The progressive display has an advantage over the interlaced display in respect of effective resolution (sharpness perceived by naked eye), however the interlaced display is sometimes adopted. For example, in a high-definition PDP in which display electrodes are arranged at regular intervals at a ratio of three per two display lines, the interlaced display is adopted by reason that drive sequence is simple compared to the case of the progressive display. Further, if a frame input to the drive circuit is the interlaced format, signals are processed easily in the interlaced display compared to the progressive display.
There are the following three problems in the interlaced display. First, effective resolution is low. In the case of the high-definition PDP mentioned above, the effective resolution is approximately 70% of the progressive display. Secondly, a picture is required to be brightened by increasing drive frequency in the sustaining process. The drive frequency is increased, thereby leading to the increased power loss due to charge of capacitance in cells. Lastly, flickers are conspicuous in a display of a still picture. In order to solve these problems, a frame is divided into plural subframes so that the subframes are displayed in progressive format, the number of subframes being equal to the number of subfields in the interlaced display. Then, the time required to perform the addressing process is doubled, and the time capable of being allocated to the sustaining process is reduced by just that much. Especially, in a PDP designed for an XGA (eXtended Graphics Array) and resolution higher than the XGA, all display lines are used; thereby, average luminance of the entire display surface per one pulse in the sustaining process is higher than the case of the interlaced display. However, small amount of pulse can be applied during the sustain period and the number of times of discharge is small, therefore the average luminance of the entire display surface is practically reduced.